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  1. Home
  2. IIT Jodhpur
  3. Projects
  4. Unified Compact Modeling and Design of High Voltage MOS Transistors
 
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Project Title
Unified Compact Modeling and Design of High Voltage MOS Transistors
Partner Organisations
Science and Engineering Research Board
SRG
Internal ID
S/SERB/HRA/20210078
Principal Investigator
Agarwal, Harshit 
Status
Ongoing
Start Date
December 23, 2021
End Date
December 22, 2023
Organisations
Indian Institute of Technology Jodhpur 
Keywords
  • MOS Transistors

  • High Voltage

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