Fast Implementation of AES Modes Based on Turing Architecture

With high-level computing facilities starting to become more affordable, there is a notable rise in the use of Graphics Processing Unit (GPU) for applications in general. A GPU is and has always been considered a co-processor and hardware with high cost-performance. It has also been seen that FPGA implementation of encryption is slower than GPGPU implementation. Therefore, the implementation of various cryptographic modules on GPU is becoming more and more popular among researchers. This paper aims to propose and test a fast implementation of AES, and its multiple modes like ECB, CBC, CTR on the latest Turing Architecture based GPUs and compare its performance with its predecessor Pascal Architecture based GPUs. The results gathered from the experiments show that the output comparisons of ECB and CTR mode make it clear that the ability to parallelize directly affects the throughput. The Turing architecture has undoubtedly provided a tremendous amount of hardware acceleration and provided high results on even a medium-range GPU like the 1650.