Modeling Power Supply Induced Jitter in a Voltage-Mode Driver with Long Transmission Lines

Power Supply Induced Jitter (PSIJ) is one of the major stakeholders in the timing budget of high-speed systems. In this paper, a systematic methodology for estimation of PSIJ for high-speed circuits having long transmission lines is presented. A semi-analytical approach considering both the spatial and temporal components of the long lines is used and the corresponding equations are derived for a voltage-mode driver circuit. The analysis is validated by comparing the proposed methodology with the conventional approach to estimate PSIJ while inducing different types of noise on power supply.