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  1. Home
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  4. Low Voltage Organic Field-Effect Transistors with Room Temperature Deposited Dielectric Layer
 
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Low Voltage Organic Field-Effect Transistors with Room Temperature Deposited Dielectric Layer

Date Issued
2021-06-20
Author(s)
Raghuwanshi, Vivek
Mahato, Ajay Kumar
Saxena, Pulkit
Rahi, Sachin
Konwar, Gargi
Tiwari, Shree Prakash
DOI
10.1109/FLEPS51544.2021.9469826
Abstract
Lowering the processing temperature is a crucial factor in the development of flexible electronic devices. Here we report the fabrication of high-performance OFETs based on room temperature deposited Ba0.5Sr0.5TiO3 (BST) as a high-k dielectric layer. The fabricated devices exhibited excellent performance while operating at a low voltage of -3 V along with demonstrating high operational stability when tested for 1 h bias stress and continuous transfer measurement cycles. In addition, inverter circuit performance is also investigated with these devices by connecting them to external loads.
Subjects
  • high-k dielectric

  • low operating voltage...

  • operational stability...

  • Organic Field-Effect ...

  • TIPS-Pentacene:PS ble...

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