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Effect of Annealing on Low-Voltage Organic Field-Effect Transistors with P(VDF-TrFE) Gate Dielectric
Date Issued
2021-06-20
Author(s)
Rahi, Sachin
Raghuwanshi, Vivek
Saxena, Pulkit
Konwar, Gargi
Tiwari, Shree Prakash
DOI
10.1109/FLEPS51544.2021.9469854
Abstract
In this work, solution-processed low voltage organic field-effect transistors (OFETs) are demonstrated using P(VDF-TrFE) as the primary gate dielectric with TIPS-Pentacene: Polystyrene (PS) blend on top, providing an active layer. Maximum field-effect mobility of 0.6 cm2 V-1s-1 with an average of 0.4 (±0.1) cm2 V-1s-1 in saturation region and high Ion/Ioff value of 104 were achieved from these devices at an operating voltage of -5V. Moreover, these devices exhibited excellent electrical stability upon multiple scans of transfer characteristics and under bias-stress. A deterioration in the performance of OFETs was observed upon annealing at temperatures over 50 °C.