Efficient Estimation of Power Supply Induced Jitter via Machine Learning

This paper presents an efficient method for the analysis of power supply induced jitter using machine learning techniques in the presence of supply noise for CMOS inverter circuits. In the proposed hybrid approach, knowledge-based neural network and deep belief neural network produce reasonably accurate jitter response while providing an efficient training using training data extracted from both analytical models as well as a circuit simulator. The proposed model can also handle varying inputs without re-training the network's parameters.